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DTSTART:19700308T020000
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DTSTAMP:20230124T171524Z
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DTSTART;TZID=America/Chicago:20221113T084000
DTEND;TZID=America/Chicago:20221113T090000
UID:submissions.supercomputing.org_SC22_sess423_ws_qcs103@linklings.com
SUMMARY:Wide Quantum Circuit Optimization with Topology Aware Synthesis
DESCRIPTION:Workshop\n\nWide Quantum Circuit Optimization with Topology Aw
 are Synthesis\n\nWeiden, Kalloor, Kubiatowicz, Younis, Iancu\n\nUnitary sy
 nthesis is an optimization technique that can achieve optimal gate counts 
 while mapping quantum circuits to restrictive qubit topologies.  Synthesis
  algorithms are limited in scalability by their exponentially growing run 
 times.  Application to wide circuits requires partitioning into smaller co
 mponents.  In this work, we explore methods to reduce depth and multi-qubi
 t gate count of wide, mapped quantum circuits using synthesis.  We present
  TopAS, a topology aware synthesis tool that preconditions quantum circuit
 s before mapping.  Partitioned subcircuits are optimized and fitted to spa
 rse subtopologies to balance the opposing demands of synthesis and mapping
  algorithms.  Compared to state of the art wide circuit synthesis algorith
 ms, TopAS is able to reduce depth on average by 35.2% and CNOT count by 11
 .5% for mesh topologies.  Compared to the optimization and mapping algorit
 hms of Qiskit and Tket, TopAS is able to reduce CNOT counts by 30.3% and d
 epth by 38.2% on average.\n\nSession Format: Recorded\n\nTag: Quantum Comp
 uting\n\nRegistration Category: Workshop Reg Pass
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