The International Conference for High Performance Computing, Networking, Storage, and Analysis
The International Conference for High Performance Computing, Networking, Storage, and Analysis
Workshop: 12th Workshop on Fault-Tolerance for HPC at Extreme Scale (FTXS 2022)
Authors: Bo Fang (Pacific Northwest National Laboratory (PNNL)), Siva Hari and Timothy Tsai (NVIDIA Corporation), Xinyi Li and Ganesh Gopalakrishnan (University of Utah), Ignacio Laguna (Lawrence Livermore National Laboratory), and Kevin Barker and Ang Li (Pacific Northwest National Laboratory (PNNL))
Abstract: Graphics Processing Units (GPUs), the dominantly adopted accelerators in HPC systems, are susceptible to a transient hardware fault. A new generation of GPUs features mixed-precision architectures such as NVIDIA Tensor Cores to accelerate matrix multiplications. While widely adapted, how they would behave under transient hardware faults remain unclear. In this study, we conduct large-scale fault injection experiments on GEMM kernels implemented with different floating-point data types on the V100 and A100 Tensor Cores and show distinct error resilience characteristics for the GEMMS with different formats. We plan to explore this space in the future by building precision-aware floating-point fault tolerance techniques for applications such as DNNs that exercise low-precision computations.
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